1. Field of the Invention
The present invention relates generally to magnetic elements utilizing spin-dependent tunneling effects and also to magnetic read heads, magnetic sensor devices, magnetic storage device, and magnetic memory devices using the elements.
2. Description of the Related Art
Currently available spin-dependent transport elements utilizing magnetism include known giant magnetoresistive (GMR) elements due to spin-dependent scattering at an interface between a magnetic metal layer and a non-magnetic metal layer. This is an artificial superlattice which is structured from alternate lamination of magnetic metal layers and nonmagnetic metal layers of thicknesses on the order of magnitude of several Angstroms to several tens of Angstroms, wherein magnetic moments of opposed magnetic metal layers with a nonmagnetic layer sandwiched therebetween are coupled together in a magnetically antiparallel state at zero externally applied magnetic field. When applying an external magnetic field to this artificial super lattice for establishment of one directional alignment of the magnetic moments of the magnetic metal layer, its resistivity decreases significantly, resulting in observation of a giant magnetoresistive effect as large as twenty to sixty percent. This advantage of such artificial superlattice does not come without accompanying penalties which follow: the requisite number of layers laminated over one another should be increased in order to obtain the significant magnetoresistive effect required; and the resulting saturated magnetic field stays significant on the order of magnitude of Tesla or greater, which serves as a serious bar to practical implementation thereof.
In recent years, a so-called xe2x80x9cspin valvexe2x80x9d GMR film has been developed, which is less than metallic artificial super lattices both in lamination number and in intensity of saturated magnetic field. The spin valve GMR film is designed to employ a tri-layered structure that consists of magnetic metal layers with an intervening nonmagnetic metal layer sandwiched between them. The magnetization of one of these magnetic metal layers is fixed or xe2x80x9cpinnedxe2x80x9d in a desired direction while permitting only the remaining magnetic metal layer to invert or xe2x80x9cswitchxe2x80x9d its magnetization upon application of an external magnetic field thereto, thereby forcing a relative angle between the magnetization directions of such two magnetic metal layers to change or vary accordingly. The tri-layered spin valve film exhibits a magnetoresistance effect of about 10% or less.
Another type of tunnel magnetoresistance (TMR) element adaptable for use as the spin-dependent transport device is known, which is based on the spin-dependent tunneling effect that is different in mechanism from spin-dependent scattering phenomena. This element includes a tri-layered structure consisting of two magnetic metal layers with an intermediate dielectric layer sandwiched therebetween, wherein one of the magnetic metal layers stacked has smaller coercive force than the other for producing a tunnel current flow upon applying of a voltage between the opposite magnetic metal layers. At this time, when inverting or switching the direction of the magnetization of the magnetic metal layer having small coercivity, spinning motion of such magnetic metal layer less in coercivity, a significant difference will be found between the value of a tunnel current obtainable when the relative orientation of the magnetizations are parallel to each other and that obtained when these are anti-parallel to each other. This large tunnel current difference leads to the capability of obtaining increased magnetoresistive effect of more than 10% at room temperature.
Ferromagnetic double tunnel junction elements are also known which have a five-layer laminated structure consisting of threexe2x80x94i.e. upper, intermediate, and lowerxe2x80x94magnetic metal layers with a dielectric layer sandwiched between the upper and intermediate metal layers and also with another dielectric layer between the intermediate and lower metal layer. Some ferromagnetic double tunnel junction elements have been proposed by the inventors as named herein, which element has a multilayer structure with its intermediate ferromagnetic metal layer being constituted from a layer of fine particles made of ferromagnetic materials, as disclosed by the present inventors, Jpn. J. Appl. Phys., 36 L1380 (1997), and also Japanese Patent Laid-Open No. 308313/1998. These ferromagnetic double tunnel junction elements are featured in that any possible TMR reducibility due to biassing stays less.
Several ways of applying the above-noted GMR and TMR elements to magnetic read/write heads and magnetic random access memories and the like have also been studied until todayxe2x80x94those magnetic heads employing spin valve GMR elements have already been put to practical use.
In the context of this document, the term xe2x80x9cmagnetic random access memory (MRAM) xe2x80x9d is defined to mean any solid-state memory device capable of randomly rewriting information to be recorded andalso storing and reading same by utilization of magnetization directions of ferromagnetic materials as information carrier. Typically an MRAM is configured from an array of memory cells each having a ferromagnetic thin film, nonmagnetic thin film, dielectric film or a multilayer structure thereof, and driver circuitry operatively associated with the memory cells via a plurality of electrical leads including read/write signal transmission lines connected thereto.
Recording data into MRAMs may be performed by causing the magnetization direction of a ferromagnetic material making up a memory cell to invert or xe2x80x9cswitchxe2x80x9d in response to a current magnetic field occurring due to a current flow in a write line coupled thereto, and then determining whether the switched magnetization direction is parallel or antiparallel to a prespecified reference direction in a way such that the former case corresponds to a binary data bit of logical value xe2x80x9c1xe2x80x9d whereas the latter corresponds to a data bit of xe2x80x9c0.xe2x80x9d In MRAMs, electrical power consumption is principally zero during storing data once written thereinto, which permits MRAMs to function as nonvolatile memory devices capable of retaining information for an extended time period even when power is removed.
On the other hand, reading data recorded in MRAMs is carried out by utilization of a specific phenomenon that the memory cell""s electrical resistivity is variable depending upon either a relative angle between the magnetization direction of a ferromagnetic material constituting a cell and a sense current or, alternatively, a relative angle between the magnetization directions of a plurality of ferromagnetic layers. This phenomenon is called the magnetoresistive (MR) effect among those skilled in the art to which the invention pertains. Known magnetoresistive effect is an anisotropic magnetoresistive (AMR) effect in which an electrical resistance varies in value depending on whether a relative angle between a current and magnetization is parallel or vertical to each other. Other MR effects are also known, including giant magnetoresistive (GMR) effect and tunnel magnetoresistive (TMR) effect, wherein the former is such that electrical resistivity varies depending on whether magnetizations of multiple ferromagnetic layers with a non-magnetic conductor sandwiched therebetween are parallel or antiparallel in alignment to each other, whereas the latter is that tunnel resistivity varies depending on whether magnetization of a plurality of ferromagnetic layers with an electrically insulative material sandwiched therebetween are parallel or antiparallel in alignment direction to each other.
With prior known memory cells exhibiting the AMR and GMR effects (referred to hereinafter as xe2x80x9cAMR cellxe2x80x9d and xe2x80x9cGMRxe2x80x9d cell respectively), the direction of a sense current flow typically stays parallel to the film surface of a ferromagnetic material used. Almost all of currently employed materials exhibiting the AMR and GMR effects are good conductive, the sheet resistivity of which has values within a range of approximately a few to several tens of xcexa9/xcexcm2. Accordingly, assuming that the resistance value of a memory cell is about 100 xcexa9 while letting the magnetoresistance ratio be about 5% and also letting the minimum detection sensitivity of a sense amplifier connected to the memory cell be about 50 mV, a sense current of about 10 mA should be required in order to obtain a necessary cell output voltage. In presently commercially available metal oxide semiconductor field effect transistors (MOSFETs), a source-drain current IS is proportional in value to ratio of channel width W to channel length L (W/L) One example is that when W is about 3.3 xcexcm and L is about 1 xcexcm, the value of IS is nearly equal to 0.1 mA. Thus, the sense current value of about 10 mA is extremely excessive relative to those transistors as manufactured to have their minimum feature size satisfying the so-called sub micron rules in modern semiconductor microfabrication technologies.
One possible approach to avoiding this problem is to design MRAM cells using the AMR or GMR effect so that a plurality of AMR/GMR cells are serially coupled together to thereby constitute a data line, as has been disclosed in IEEE Trans Comp. Pac Manu. Tech. pt. A, 17, 373 (1994). An advantage of this approach lies in an ability to increase the area of a transistor while at the same time increasing its channel width without having to increase a cell area per se because of the fact that multiple memory cells are designed to commonly share a single data line-driving transistor. For instance, it is taught by the above-identified citation that eight separate memory cells are connected in series with one another while employing a transistor with W/L of about 50/1, permitting supplement of a sense current of about 2.5 mA.
The use of such serial combination of memory cells is encountered with a problem that the resultant power consuming efficiency greatly decreases. More specifically, with the technique taught by the above document, the consumption efficiency xcex7/during reading data out of a certain memory cell is given as xcex7=1/8=0.125. Such less power consumption efficiency serves as a serious bar to the applicability to portable or xe2x80x9chandheldxe2x80x9d electronic instruments including mobile personal computers (PCs) under strict requirements as to low power consumption.
To avoid these problems, it has been proposed that the TMR effect is applied in place of the AMR/GMR effects. Amemory cell exhibiting the TMR effect (referred to as xe2x80x9cTMR cellsxe2x80x9d hereafter) is typically arranged to include a tri-layered laminated structure consisting essentially of first and second ferromagnetic layers with an electrically insulative layer sandwiched between them, wherein a current flows so that it xe2x80x9ctunnelsxe2x80x9d through the insulative layer. A tunnel resistance value varies in a way proportional to the cosine of a relative angle between magnetization directions of the two ferromagnetic layers made of metals in such a manner that the resistance value is at its maximal level when these magnetizations are antiparallel in direction to each other. One example is disclosed in IEEE Trans. Mag., 33, 3553 (1997), wherein an increased magnetoresistance ratio was observed to be in excess of about 25% in the presence of a low magnetic field of about 50 Oe or less in the case of an NiFe/Co/Al2O3/Co/NiFe tunnel junction. The magnetoresistance ratio based on the TMR effect is proportional to a product of spin polarization rates P1, P2 of the first and second ferromagnetic layers. For example, the use of specific materials with spin polarization of 100% such as half-metals makes it possible to obtain magnetoresistance ratio of about 50% or greater. Also note that TMR cells are capable of obtaining high resistance values in comparison with AMR cells and GMR cells. A typical cell resistance value is about 104 to 106xcexa9 per junction area (xcexcm2). Accordingly, assuming that the resistance value of a cell with area of about 1 xcexcm2 is about 10 kxcexa9 and its magnetoresistance ratio is about 50%, a cell read signal of about 50 mV is obtainable when a sense current is about 10 xcexcA.
With TMR cells a sense current is expected to flow in a direction perpendicular to the surface of a ferromagnetic filmused. This suggests that it remains difficult to serially connect such cells together and that its cell layout is noticeably different from that of AMR and GMR cells. Most MRAMs using TMR cells are thus arranged so that these TMR cells are connected in parallel with one another. A detailed configuration thereof is such that a plurality of TMR elements are laid out into a matrix form while also employing select transistors operatively associated therewith. The select transistors may be designed in one of some proposed ways which follow: (1) select transistors are provided at respective TMR cells; (2) select transistors are disposed in units of data lines; and (3) select transistors are in units of row data lines and column data lines (for detail see J. Appl. Phys., 81, 3758 (1997)). These configurations proposed have advantages and disadvantages respectively.
The scheme (1) above is such that the resulting power consumption efficiency xcex7 stays high during reading due to the presence of a select transistor disposed at the individual cell. However, this advantage does not come without accompanying a penalty as to the difficulty of cell area reduction due to the fact that a transistor is disposed at each cell. For instance, letting the data line width be represented by xe2x80x9cF, xe2x80x9d the cell area is expected through calculation to fall within a range whose upper limit is at or near 12F2, which permits a skilled person to consider that a shrinkage limit of cell area in this scheme is substantially the same as that of DRAMs, i.e. 8F2 or more or less. On the contrary, the schemes (2) and (3) are such that an estimated cell area falls within a range of about 6F2 to 9F2 in view of the fact that any select transistor is no longer required for the individual cell. With this scheme, the cell area shrink limit is obtained when row data lines and column data lines are disposed with a distance F defined between adjacent ones of them, whose value is at about 4F2. This value makes it expectable to achieve increased integration densities as compared to the scheme (1). However, with this scheme, a sense current behaves to partly flow into more than one of the other cells coupled to the same data line. Letting the number of cells coupled to a data line be given as N, a xe2x80x9cvirtualxe2x80x9d resistance value as looked at from a data line driving transistor is 1/N of the resistance value of a single cell; thus, it becomes difficult to reduce or suppress a sense current, which in turn causes the power consumption efficiency xcex7 to greatly decrease when compared to that in the scheme (1). In addition, as a signal as output to a sense amplifier is 1/N of a cell output signal, the resultant signal-to-noise ratio during reading decreases when compared to that of (1). An only way of solving this is to increase a read time period of the sense amplifier, which would result in lack of high-speed read performance.
Improved device structures free from the disadvantages of the schemes (2) and (3) have been disclosed, for example, in U.S. Pat. Nos. 5,640,343 and 5,838,608, which are designed to employ the structure of the scheme (3) while additionally providing a semiconductor diode as serially coupled to each TMR element used. In this structure, either a pn-junction diode or Schottky diode is connected to a TMR element, wherein the TMR element is coupled to one column data line whereas the diode is to a row data line. The diode is disposed in the forward direction relative to the direction of a sense current flow, thereby attaining cell selectability through control of are rative relation of aforward directional potential drop at the diode versus a potential difference between the column data line and row data line.
In MRAM circuitry using related art TMR elements is such that any critical voltage is absent, which permits a tunnel current to readily flow upon mere application of a low voltage if a storage element is laid out directly at part between a corresponding bit line and its associated plate. To prevent such current flow, it is a must to provide an additional or xe2x80x9cextraxe2x80x9d semiconductor element or else for use as a switching element. Obviously the addition of such switching FET can greatly affect the cell area reduction required; in the worst case, the result becomes contrary to the quest for higher integration densities in data storage elements.
In recent years, many studies are directed to the theoretical investigation of a spin accumulation effect occurring at double tunnel junctions using metallic powdery grains or particles, one of which has been disclosed in J. Barns et al., Phys. Rev. Lett., 80, 1058 (1998). This spin accumulation effect will be explained in brief below.
Consider a double tunnel junction structure consisting essentially of alternating films of different materialsxe2x80x94namely, upper and lower ferromagnetic electrodes with a layer of nonmagnetic metal particles sandwiched therebetween, the electrodes and metal particle layer being electrically isolated from each other by intervening dielectric layers, one of which is between the upper electrode and the metal layer and the other of which is between this layer and the lower electrode. When the thickness of the dielectric layer is sufficiently thin a spin-polarized tunnel electron or electrons can flow upon applying of a voltage between the two ferromagnetic electrodes. Imagine that the nonmagnetic metal particles used are small in size enough to allow single electron charging effects to take place, and simultaneously two tunnel barriers (the opposite dielectric layers) are asymmetrical in conductance with each other. If this is the case, spin-polarized tunnel electrons are accumulated within the nonmagnetic metal particles in no equilibrium fashion, causing the nonmagnetic metal particles"" chemical potential xcex94xcexc to shift or offset in value in a way depending on spin states, which leads to creation of no equilibristic spin polarization. As a result, it will be expected that the TMR effect appear. It has been pointed out that the ratio is variable depending on a spin relaxation time and/or dimensions of metal particles, and that if the spin relaxation time within the nonmagnetic metal particles is sufficiently long then the TMR effect may be given by P2 in maximum, where P is the spin polarization of conduction electrons of ferromagnetic electrodes used, as suggested by A. Brataas et al., Phys. Rev., B59, 93 (1998).
Related art spin-dependent transport elements include GMR elements and TMR elements, which in turn include double tunnel junction elements using nonmagnetic metal particles. It is known among those skilled in the art that with such double tunnel junction elements, increased tunnel magnetoresistivity is theoretically expected to be obtainable owing to the spin accumulation effect, which resistivity is as large in maximal value as the squared of a spin polarization ratio of ferromagnetic electrodes.
On the other hand, although it is desirable for applying TMR elements to memory cells to dispose these TMR cells in the form of a matrix while letting a single data line driver transistor be commonly shared by a plurality of cells, this approach is faced with a problem as to the difficulty in connecting the cells into a serial combination because of the fact that TMR cells are inherently designed so that a sense current flows in a vertical direction relative to elements. And highly integrated memory device structures using currently proposed TMR cells suffer from a decrease in efficiency of consumed power and an output signal due to unwanted divergent flow of a sense current as resulted from the use of a parallel connection of cells with respect to a data line, and further from an increase in read time due to the incapability of obtaining any sufficient signal-to-noise ratios.
It is therefore an object of the present invention to provide a new and improved magnetic element expected to offer high spin accumulation effect in comparison with double tunnel junction elements using related art nonmagnetic metal fine particles, or alternatively provide a magnetic element with the spin accumulation effect obtainable at room temperature along with a memory device and a magnetic read head plus a magnetic disk element each employing these magnetic elements.
It is another object of the invention is to provide a magnetic memory device high in density and low in power consumption.
A first aspect of the present invention is directed to providing a magnetic device which comprises first and second ferromagnetic layers, and a layer of semiconductor particles neighboring the first ferromagnetic layer with a first tunnel barrier lying therebetween and also neighboring the second ferromagnetic layer with a second tunnel barrier laid therebetween, wherein the second tunnel barrier is different in conductance from the first tunnel barrier.
In accordance with a second aspect of this invention, a magnetic element is provided which comprises a ferromagnetic electrode, a non magnetic electrode, and a layer of ferromagnetic semiconductor particles neighboring the ferromagnetic electrode with a first tunnel barrier laid therebetween while neighboring the nonmagnetic electrode with a second tunnel barrier therebetween, wherein the second tunnel barrier is different in conductance from the first tunnel barrier.
The first and second inventive teachings are related to specific magnetic elements of the spin-dependent tunnel effect as expected to offer higher spin accumulation effect by use of island-like nonmagnetic or ferromagnetic semiconductor or fine particles surrounded by dielectric layers, while also relating to application of the same to data storage or xe2x80x9cmemoryxe2x80x9d devices and magnetic disk elements. The fine particles may have representative dimension on the order of nano meters. Each of the fine particles may have several different cross sectional shapes, such as spherical, oval, and others.
To enable observation of the intended spin accumulation effect in those particles sandwiched between two tunnel barriers, the following criteria must be met: i) operation temperatures are lower than the charging energy Ec, of the semiconductor fine particles; and ii) the spin relaxation time xcfx84sf of tunneling electrons in the fine particles is longer than the tunneling time. The latter criterion ii) requires establishment of
xcfx84sf greater than RC,xe2x80x83xe2x80x83(1)
where R is the electrical resistivity of a junction, C is the capacitance thereof, and thus RC defines the tunneling time. On the other hand, the charging energy Ec of the former criterion i) at an extra-small or xe2x80x9cmicroxe2x80x9d tunnel junction may be given as
Ec=e2/2C,xe2x80x83xe2x80x83(2)
where xe2x80x9cexe2x80x9d is the electrical charge of an electron, and C is the capacitance of the junction. From Equations (1) and (2), it would be appreciated that a specific relation must be established as follows:
xcfx84sf greater than Rxc3x97(e2/2Ec).xe2x80x83xe2x80x83(3)
As xcfx84sf is determinable by selection of a material used, Formula (3) requires that Ec, must be large in value.
Generally the spin relaxation time in semiconductor is long, and the number of electrons residing in such semiconductor fine particles is extremely smaller than the number of electrons in metals of the same size. Consequently, the charging energy Ec is large, which permits relatively easy satisfaction of Formula (3). This in turn makes it possible to achieve observation of the intended spin accumulation effect even at room temperature.
Further, in the semiconductor fine particles, the discrete energy level due to the quantum confinement effect may be observed. xcex4 between discrete energy levels as defined by the quantum theory therein. The chemical potential shift xcex94xcexc is proportional to the energy level separation xcex4, leading to a capability to increase the resulting TMR effect. When employing a ferromagnetic semiconductor material as the fine particle, TMR is given by 2P2. The TMR in this case increases so that it is two times greater than that in the case of nonmagnetic metal particles, which is further preferable.
The above-noted junction using the semiconductor fine particles should not be limited only to double tunnel junction structures and may also be applicable to treble or more complicated tunnel junctions, wherein the same or better TMR results are obtainable by employing similar structures thereto.
In case spin-dependent tunnelling elements using the semiconductor fine particles noted above are applied to electronic parts or components such as for example data storage or xe2x80x9cmemoryxe2x80x9d elements, any additional transistors for use in selecting a desired element are no longer required, thus enabling provision of superior nonvolatile memory elements high in integration density and yet low in power consumption.
In contrast to the first and second inventions discussed above, in case that fine particles are used in the double tunnel junction structure with the multilayer structure consisting of ferromagnetic layer (electrode)/insulating layer/nonmagnetic metal particles/insulating layer/ferromagnetic layer (electrode), as has been explained in the introductory part of the description, the number of conduction electrons per unit volume is larger whereby the discrete energy levels separation xcex4 due to the quantum confinement effect stays less so that the shift xcex94xcexc of chemical potential is small, which in turn makes it hardly expectable to achieve any intended large spin accumulation effect. Additionally, while environmental temperatures must be lower than the charging energy EC of fine particles used, any required spin accumulation effect will no longer be expectable. In the case of metal fine particles, size of the particle on the order of sub-nanometers is required for this criterion. Accordingly, in case such spin-dependent tunneling elements using the spin accumulation effect are applied to memory elements or the like, it is inevitable to employ extra transistors for use in selection of individual elements.
The first and second concepts of the inventions stated supra are adaptable for use in magnetic read heads, magnetic sensors, magnetic memory devices or any possible equivalents thereto.
In accordance with a third aspect of the instant invention, a magnetic memory device is provided which comprises: a plurality of memory cells including spin-dependent tunneling effect elements each having a first ferromagnetic electrode, a second ferromagnetic electrode, and a gate electrode as inserted between the first and second ferromagnetic electrodes with first and second dielectric layers laid between the electrodes and the gate electrode; data lines including a data line connected in common to the first or second ferromagnetic electrodes of the spin-dependent tunnel effect elements; and a plurality of word lines capacitively coupled to the gate electrodes of the memory cells different from one another, wherein cell selection of selecting one from among the plurality of memory cells as commonly connected to the data line during reading information stored therein is performed by selecting one of the word lines to cause the selected word line to change in voltage, and then letting more than one memory cell capacitance-coupled to the selected word line change in electrical resistance value.
With the third invention, the word lines may be arranged to cross over the data lines.
In addition, with the third invention, the first ferromagnetic electrode, first dielectric layer, gate electrode, second dielectric layer and second ferromagnetic electrode are laminated in this order of sequence, wherein the second dielectric layer includes a first region with the second ferromagnetic electrode formed therein and a second region with the second ferromagnetic layer being absent therein, and wherein the word line is laid out along the second region of the plurality of memory cells.
With the third invention, the spin-dependent tunneling effect element exhibits two different tunnel resistance values through voltage variation of the word line, wherein a specified one of these values is at least one thousand times greater than the remaining one thereof.
In addition, with the third invention, the gate electrode may be a granular magnetic film having ferromagnetic fine particles with coercivity as dispersed within a dielectric matrix.
Additionally, with the third invention, the gate electrode may be a granular film having nonmagnetic particles or semiconductor particles as dispersed in a dielectric matrix, wherein a spin relaxation time of either the nonmagnetic particles or the semiconductive particles is longer than a tunnel time as taken to complete tunneling from the first or second ferromagnetic electrode through the dielectric layer up to the gate electrode.
Furthermore, with the third invention, the gate electrode may be metal or semiconductor fine particles with a quantum resonance energy level.